It is frequently necessary to interconnect different logic families such as emitter-coupled logic (ECL) and transistor-transistor logic (TTL). ECL circuitry may be utilized in an integrated circuit because of its high speed, while the inputs and outputs are required to be TTL compatible. An example of such a circuit is a high speed voltage comparator which utilizes ECL circuitry, but has TTL inputs and outputs. In such integrated circuits, the ECL circuitry is connected to a TTL output stage.
Conventional ECL circuitry is operated from a -5.2 volt supply and includes an emitter follower on each output. The ECL circuitry discussed herein is similar to conventional ECL circuitry but is typically operated from a positive five volt supply and does not include emitter followers on outputs. As used hereinafter, the phrase "ECL circuit" refers to such ECL like circuitry.
In many modern TTL circuits, the output stage consists of two distinct paths, a high side path and a low side path. The input voltage to switch the TTL output stage is three diode voltages plus a small additional overdrive across a current limiting resistor, and is referenced to ground. The switching voltage of the TTL output stage varies with temperature. The ECL circuit which drives the TTL output stage provides a signal that is referenced to the positive supply voltage. For example, the ECL circuit may provide an output voltage swing between +4.2 volts and +5.0 volts. This signal varies with the positive supply voltage and is not at the required level to drive the TTL output stage.
Level shift circuits have been used in the prior art to translate a positive supply-referenced signal to a ground-referenced signal compatible with the TTL output stage. One drawback in prior art level shift circuits has been nonsymmetrical operation. When the level shift circuit provides an output signal and its complement, such circuits have experienced slew rate problems which result in nonsymmetrical outputs and discontinuities, or "glitches", in the outputs. In one prior art circuit, the nonsymmetrical output is alleviated by speedup capacitors. However, the speedup capacitors occupy relatively large areas on the integrated circuit. Furthermore, stray capacitance associated with the speedup capacitors can introduce additional unwanted discontinuities and nonsymmetrical outputs.
It is a general object of the present invention to provide an improved level shift circuit for converting a positive supply referenced signal to a lower voltage-referenced signal.
It is another object of the present invention to provide a level shift circuit which provides symmetrical operation without requiring the use of speedup capacitors.
It is a further object of the present invention to provide a level shift circuit which is simple in construction and low in circuit area.
It is yet another object of the present invention to provide a level shift circuit which provides reliable operation independent of power supply variations.
It is a further object of the present invention to provide a level shift circuit which provides reliable operation independent of temperature variations.